The present invention relates to RF power amplifiers, and particularly to a technology which is effective in reducing the input impedance of a primary coil in a transformer of an impedance matching circuit without involving a reduction in Q-factor.
As has been well known, in a radio-frequency (RF) power amplifier mounted in a communication device such as a mobile phone terminal device or a wireless LAN terminal, an impedance matching circuit is coupled between a source-grounded or emitter-grounded power amplification transistor and a load for the purpose of efficiently driving the antenna of the load with the power amplification transistor. The impedance matching circuit transforms a low output impedance of several ohms of the power amplification transistor to a high input impedance of typically 50 ohms of the load. The impedance matching circuit is formed of passive elements which are a coil and a capacitor, and can be formed of a voltage transformer (transformer) having no loss and a predetermined transformation ratio. The primary coil of the transformer is coupled to the drain or collector of the power amplification transistor, while the secondary coil of the transformer is coupled to the antenna of the load.
In Non-Patent Document 1 listed below, a high-efficiency class-B push-pull power amplifier is described in which, in an impedance matching circuit using a transformer, one end and the other end of the primary coil of the transformer are coupled to a pair of N-channel MOS transistors driven by a complementary pair of input signals. To the midpoint of the primary coil, a drain power supply voltage is supplied, and the secondary coil of the transformer is coupled to a load.
In Non-Patent Document 2 listed below, a monolithic RF power amplifier is described in which a first on-chip transformer as an input balun, second and third on-chip transformers as a driver stage and an inter-stage matching circuit, and a power output stage are integrated on a silicon chip. The driver stage includes a pair of driver transistors that are driven by respective signals from both ends of the secondary coil of the first on-chip transformer. The power output stage includes a pair of output transistors that are driven by respective signals from both ends of the secondary coils of the second and third on-chip voltage transformers. To each of the collectors of the pair of driver transistors, a power supply voltage is supplied via the primary coil of each of the second and third on-chip transformers. The three on-chip transformers are each formed of three-layer wiring over the silicon chip. To each of the collectors of the pair of driver transistors in the driver stage, an output matching circuit formed of a plurality of coils and a plurality of capacitors which are external members of the silicon chip is coupled.
In Non-Patent Document 3 listed below, there is described a power amplifier for solving a problem associated with the output matching circuit formed of the external members of the monolithic RF power amplifier described in Non-Patent document 2 listed below, and also solving the problems of low breakdown voltage and heat dissipation of a short-channel MOS transistor. The power amplifier is called a distributed active-transformer (DAT) power amplifier by the authors of Non-Patent document 3. The primary coil of the distributed active-transformer (DAT) is formed of a plurality of slab inductors arranged in an annular configuration, and each having a high Q-factor. Between the plurality of inductors, differential push-pull amplifiers each including a pair of N-channel MOS transistors driven by a complementary pair of input signals are coupled. In the primary coil of the distributed active-transformer (DAT), the plurality of inductors and the plurality of differential push-pull amplifiers are alternately arranged along the annular configuration. The secondary coil of the distributed active-transformer (DAT) is formed of a 1-turn metal strip inside the primary coil having the annular shape. Since the plurality of differential push-pull amplifiers of the primary coil allow flows of identical synchronized alternating currents, a magnetic field is induced in the secondary coil so that the sum of the differential voltages of the plurality of differential push-pull amplifiers is generated. As mentioned above, DAT is the abbreviation of the distributed active-transformer.
The DAT power amplifier described in Non-Patent Document 3 listed below also includes, in order to supply the complementary pair of input signals to the respective gates of each of the MOS transistors of the plurality of differential push-pull amplifiers, differential signal lines for supplying a balanced signal from the outside of the annular shape to the center portion of the annular shape in order to supply the complementary pair of input signals to the respective gates of the pair of MOS transistors of each of the plurality of differential push-pull amplifiers. Between the center portion and each of the respective gates of the pair of MOS transistors, a distribution circuit for symmetrical coupling is disposed. Note that, since the primary coil having the annular shape of the distributed active-transformer (DAT) is formed of the plurality of slab inductors each having a linear shape, each of the slab inductors has a Q-factor higher than that of a typical spiral inductor in which a negative mutual inductance is generated by current flowing in opposing wires.
In Non-Patent Document 4 listed below, it is stated that the circular structure of a distributed active-transformer (DAT) of a DAT power amplifier as described in Non-Patent Document 3 listed below serves as a factor causing cross coupling of an input and an output of power which destabilizes the amplifier. In Non-Patent Document 4 listed below, it is also stated that the power coupling structure of the distributed active-transformer (DAT), which is rather large compared with active devices, determines the total chip size, and hence is not desirable in terms of cost. Therefore, in Non-Patent Document 4 listed below, in order to reduce the linking of the input and the output for the sake of stability, input ports coupled to power devices are disposed at the portion of the primary coil corresponding to one side of the quadrilateral of the distributed active-transformer (DAT), while the output port of the secondary coil of the distributed active-transformer (DAT) is disposed at the opposite side of the quadrilateral thereof.
Non-Patent Document 1
    Frederic H. Raab et al, “RF and Microwave Power Amplifier and Transmitter Technologies-Part 2”, High Frequency Electronics, PP. 22-36, May 2003.Non-Patent Document 2    Werner Simburger et al., “A Monolithic Transformer Coupled 5-W Silicon Power Amplifier with 59% PAE at 0.9 GHz”, IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 34, NO. 12 December 1999, PP. 1881-1892.Non-Patent Document 3    Ichiro Aoki et al., “Fully Integrated CMOS Power Amplifier Design Using the Distributed Active-Transformer Architecture”, IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 37, NO. 3, March 2002, PP. 371-383.Non-Patent Document 4    Kyu Hwan An et al, “A Monolithic Voltage-Boosting Parallel-Primary Transformer Structures for Fully Integrated CMOS Power Amplifier Design”, 3 to 5 Jun. 2007, 2007 IEEE Radio Frequency Integrated Circuits Symposium, PP. 419 to 422.